Principal Digital Verification Engineer (mfd)
NXP Semiconductors
Produktion Halbleiter
Gratkorn, Steiermark - Österreich
Senior Fachkraft / Projektleiter
Hybrid
Experteer Overview
In this role you drive verification for one or more submodules, defining and executing a cohesive verification strategy with the DV team. You work closely with subsystem architects, HW/SW designers, and system engineers to translate requirements into verifiable plans and tests. You will document metrics, maintain DV processes, and stay current with verification methodologies. This position offers chance to shape verification for ASIC/SoC blocks and contribute to security-related tasks. A collaborative, technically demanding environment awaits you in Gratkorn.
Leistungen / Benefits
- home office
- flexible working time
- meal benefits
Verantwortungsbereiche
- Own verification of specified submodules, including verification IPs and testbenches across integration levels
- Review requirements and design specs for new function/tech increments
- Collaborate with subsystem architect and leads to define integrated verification strategy
- Break down strategy into DV activities with planning support and prioritization
- Define and document metrics and verification completion methodology; specify testbench components
- Track and document verification progress per process; prepare/update verification specs and project phase reports
- Interact with peers, HW/SW designers, and system engineers for issue resolution
- Contribute to maintenance and improvement of DV process and methodologies
- Stay updated on verification methodologies and tools through courses and literature
Zentrale Anforderungen
- Master in Electrical/Electronic Engineering or Computer Science (or equivalent)
- At least eight years of proven professional experience in Digital Design and Verification
- SystemVerilog and UVM methodology training certifications from EDA vendors
- Familiarity with ASIC/SoC design flow and process
- Advanced knowledge of Verilog and SystemVerilog (VHDL is a plus)
- Proven experience in testbench design and development using UVM
- High proficiency in Metric Driven Verification concepts, functional and code coverage
- High proficiency in directed and constrained random methodologies
- Advanced knowledge of formal verification methodologies and assertions
- Proficiency with bash/tcsh, tcl, Python and C for testcases
- Experience with centralized Version Control Systems (SVN, GIT, ClearCase)
- Comfortable in a collaborative, technically demanding team
- Strong English communication skills
- Security-related tasks may be part of the role
Stellenbeschreibung
In this role you drive verification for one or more submodules, defining and executing a cohesive verification strategy with the DV team. Yo…
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